Lower Power Consumption for 40-nm PCIe Designs

27% of surveyed customers who used DesignWare IP for PCIe in the 40-nm process saved >30% in power consumption compared to competitive alternatives.

Source:
Survey of 11 users of Synopsys DesignWare IP who selected 40-nm

About This Data

This data was sourced directly from verified users of Synopsys DesignWare IP by TechValidate.

TechValidate verifies the identity and organizational affiliation of all participants that contribute to published research data, while guaranteeing their anonymity so that they may share information honestly and freely. The research data displayed here represents a subset of all data collected.

Validated on Aug 16, 2013 | Respondent Details


More Research on Synopsys DesignWare IP   Explore all TechValidate Research