DesignWare USB IP Success in a Wide Range of Process Nodes

Which of the following process nodes did you use to implement Synopsys’ USB IP?

28-nm
46%
40-nm
56%
55-nm
14%
65-nm
38%
90-nm
18%
110-nm
2%
130-nm
9%
180-nm
6%

Note: this is a multiple-choice question – response percentages may not add up to 100.

Source:
Survey of 124 users of Synopsys DesignWare IP

About This Data

This data was sourced directly from verified users of Synopsys DesignWare IP by TechValidate.

TechValidate verifies the identity and organizational affiliation of all participants that contribute to published research data, while guaranteeing their anonymity so that they may share information honestly and freely. The research data displayed here represents a subset of all data collected.

Validated on Oct 26, 2012 | Respondent Details

Selected individual responses used in this chart:

Title Company Size Industry Response
Design Engineer S&P 500 Electronics
  • 90-nm
Engineer Medium Enterprise Computer Hardware
  • 28-nm
Hardware Engineering Manager Large Enterprise Telecommunications Equipment
  • 28-nm
  • 40-nm
  • 65-nm
Design Engineer Large Enterprise Electronics
  • 40-nm
  • 55-nm
  • 90-nm
  • 130-nm
  • 180-nm
Design Engineer Medium Enterprise Electronics
  • 130-nm
Hardware Engineering Manager Small Business Electronics
  • 40-nm
  • 65-nm
CAD Engineer Medium Enterprise Electronics
  • 40-nm
Engineer Large Enterprise Telecommunications Equipment
  • 28-nm
  • 40-nm
  • 55-nm
  • 65-nm
  • 90-nm
  • 110-nm
  • 130-nm
  • 180-nm
Design Engineer S&P 500 Electronics
  • 28-nm
Hardware Engineering Manager Global 500 Electronics
  • 28-nm

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