Case Study: Small Electronics Company

Challenges

  • Needed to address the following challenges with memory compilers:
    • Meet aggressive performance targets
    • Meet aggressive power targets
    • Meet aggressive area targets

Use Case

  • Used Synopsys’ DesignWare Memory Compilers at 40-nm LP process node.
  • Implemented the following functions containing DesignWare Memory IP:
    • CPU cores (e.g., ARM, MIPS, ARC, etc.)

Results

  • Purchased Synopsys’ DesignWare Memory Compilers due to:
    • Higher speed than other solutions
    • Lower power than other solutions
    • Lower area than other solutions
    • Availability on required process node(s)
    • Previous experience with Synopsys IP
    • Good customer support
  • Rated the following DesignWare Memory Compiler attributes as highly differentiated:
    • Speed
    • Power consumption
    • Area
    • Completeness of solution (memory, BIST, repair, post-silicon debug)
  • Rated the following DesignWare Memory Compiler attributes as differentiated:
    • Features/capabilities
    • Silicon validation
    • Ease of integration
  • Rated the following Synopsys’ DesignWare STAR Memory System (SMS) attributes as 1-10% better than the competition:
    • Area
    • Quality of test
    • Features/capabilities
    • Ease of use
    • Completeness of solution (memory, BIST, repair, post-silicon debug)
  • Achieved 1-9% improvement in dynamic power, leakage power and area, and a 1 – 10% increase in performance with DesignWare Memory Compilers.
  • Realized the following benefits with DesignWare Memory Compilers:
    • Met design’s performance, power and area goals
    • Accelerated development schedule
    • Reduced silicon bring-up time and effort
    • Received knowledgeable and responsive technical support
    • Got very good customer support

Testimonials

“Good product features and great customer support enabled us to achieve higher performance in our design.”

Source:
TechValidate survey of a Small Business Electronics Company

About This Data

This data was sourced directly from verified users of Synopsys DesignWare IP by TechValidate.

TechValidate verifies the identity and organizational affiliation of all participants that contribute to published research data, while guaranteeing their anonymity so that they may share information honestly and freely.

Validated on Oct 09, 2013


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