Case Study: S&P 500 Electronics Company

Challenges

  • Needed to address the following challenges with memory compilers:
    • Meet aggressive performance targets
    • Meet aggressive power targets
    • Meet aggressive area targets
    • Meet aggressive time-to-market window
    • Reduce development cost
    • Obtain high yield
    • Improve availability of IP in target foundry process
    • Reduce project risk
    • Enable design team to focus on differentiated portions of their design

Use Case

  • Used Synopsys’ DesignWare Memory Compilers at 65-nm LP process node.
  • Implemented the following functions containing DesignWare Memory IP:
    • CPU cores (e.g., ARM, MIPS, ARC, etc.)
    • DSP cores
    • Microcontroller cores
    • Other blocks of the SoC

Results

  • Purchased Synopsys’ DesignWare Memory Compilers due to:
    • Higher speed than other solutions
    • Lower power than other solutions
    • Lower area than other solutions
    • Extensive silicon success
    • Quality of the IP
    • Ease of integration effort
    • Completeness of solution (memory, BIST, repair, post-silicon debug)
    • Availability on required process node(s)
    • Previous experience with Synopsys IP
  • Rated the DesignWare Memory Compilers’ ease of integration and the completeness of solution (memory, BIST, repair, post-silicon debug) as highly differentiated.
  • Rated the following DesignWare Memory Compiler attributes as differentiated:
    • Speed
    • Power consumption
    • Area
    • Features/capabilities
    • Silicon validation
  • Achieved a 30-50% improvement in leakage power and an 11 – 20% increase in performance with DesignWare Memory Compilers.
  • Achieved a 1-9% improvement in dynamic power and area with DesignWare Memory Compilers.
  • Realized the following benefits with DesignWare Memory Compilers:
    • Achieved first-pass silicon success
    • Met design’s performance, power and area goals
    • Accelerated development schedule
    • Reduced development cost
    • Reduced silicon bring-up time and effort
    • Improved yield due to repair
    • Received knowledgeable and responsive technical support
    • Achieved first-to-market success

Testimonials

“The DesignWare Memory Compilers are easy to use, and with them we achieved first time working silicon.”

Source:
TechValidate Survey of a S&P 500 Electronics Company

About This Data

This data was sourced directly from verified users of Synopsys DesignWare IP by TechValidate.

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Validated on Oct 10, 2013


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